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| Technology family | HC(T) |
| Bits (#) | 8 |
| Supply voltage (min) (V) | 2 |
| Supply voltage (max) (V) | 6 |
| IOL (max) (mA | 5.2 |
| IOH (max) (mA) | -5.2 |
| Supply current (max) (µA) | 80 |
| Input type | Standard CMOS |
| Output type | Push-Pull |
| Features | Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode |
| Rating | Catalog |
| Operating temperature range (°C) | -40 to 125 |
| EM74HC164AD | SOP-14L | plastic small outline package; 14 leads; body width 3.9 mm |
| EM74HC164APW | TSSOP-14L | plastic thin shrink small outline package; 14 leads; body width 4.4 mm |
- Wide supply voltage range from 2.0 V to 6.0 V
- High noise immunity
- CMOS low power dissipation
- Gated serial data inputs
- Asynchronous master reset
- Latch-up performance exceeds 250 mA
- Complies with JEDEC standard:
- JESD8C(2.7 V to 3.6 V)
- JESD7A(2.0 V to 6.0 V)
- ESD protection:
- HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 3500 V
- CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000 V
- Multiple package options
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
The EM74HC164 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data entry through the other input. Data is shifted on the LOW-to-HIGH transitions of the clock (CP) input. A LOW on the master reset input (MR ) clears the register and forces all outputs LOW, independently of otherinputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC